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MAX1211
12-Bit, 65Msps, IF Sampling ADC


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Description
FULL DATA SHEET (PDF, 536kB)
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The MAX1211 is a 3.3V, 12-bit analog-to-digital converter (ADC) featuring a fully differential wideband track-and-hold (T/H) input, driving the internal quantizer. The MAX1211 is optimized for low power, small size, and high dynamic performance in intermediate frequency (IF) sampling applications. This ADC operates from a single 3.0V to 3.6V supply, consuming only 340mW while delivering a typical signal-to-noise ratio (SNR) performance of 66.8dB at a 175MHz input frequency. The T/H-driven input stage accepts single-ended or differential inputs. In addition to low operating power, the MAX1211 features a 0.15mW power-down mode to conserve power during idle periods.

A flexible reference structure allows the MAX1211 to use its internal precision bandgap reference or accept an externally applied reference. A common-mode reference is provided to simplify design and reduce external component count in differential analog input circuits.

The MAX1211 supports both a single-ended and differential input clock drive. Wide variations in the clock duty cycle are compensated with the ADC's internal duty-cycle equalizer.

The MAX1211 features parallel, CMOS-compatible outputs. The digital output format is pin selectable to be either two's complement or Gray code. A data-valid indicator eliminates external components that are normally required for reliable digital interfacing. A separate power input for the digital outputs accepts a voltage from 1.7V to 3.6V for flexible interfacing with various logic levels. The MAX1211 is available in a 6mm x 6mm x 0.8mm, 40- pin thin QFN package with exposed paddle (EP), and is specified for the extended industrial (-40°C to +85°C) temperature range.

See a parametric table of the complete family of pin-compatible, 12-/14-bit high-speed ADCs.

Key Features   Applications/Uses
  • Direct IF Sampling Up to 400MHz
  • 700MHz Input Bandwidth
  • Excellent Dynamic Performance
    • 66.8dB SNR at fIN = 175MHz
    • 79.7dBc SFDR at fIN = 175MHz
  • 3.3V Low-Power Operation
    • 314mW (Single-Ended Clock Mode)
    • 340mW (Differential Clock Mode)
  • Differential or Single-Ended Clock
  • Accepts 20% to 80% Clock Duty Cycle
  • Fully Differential or Single-Ended Analog Input
  • Adjustable Full-Scale Analog Input Range
  • Common-Mode Reference
  • Power-Down Mode
  • CMOS-Compatible Outputs in Two's Complement or Gray Code
  • Data-Valid Indicator Simplifies Digital Interface
  • Out-of-Range Indicator
  • Miniature, 40-Pin Thin QFN Package with Exposed Paddle
  • Evaluation Kit Available (Order MAX1211EVKIT)

 
  • Cellular, LMDS, Point-to-Point Microwave, MMDS, HFC, WLAN
  • IF and Baseband Communication Receivers: Cellular, Point-to-Point Microwave, HFC, WLAN
  • Low-Power Data Acquisition
  • MMDS, HFC, WLAN
  • Portable Instrumentation
  • Ultrasound and Medical Imaging

    Key Specifications:   High-Speed ADCs (> 5Msps)
    Part Number Resolution (Bits) Sample Rate (max) (Msps) Sample Rate (max) (Msps) AC Specs @ fIN (MHz) SFDR (dBc) SINAD (dB) SNR (dB) THD (db) INL (±LSB) DNL (±LSB) Full-Power BW (MHz)
    MAX1211  12 65 65 175 79.7 66.5 66.8 -78.7 0.3 0.3 700
    See All High-Speed ADCs (> 5Msps) (81)

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    Document Ref.: 19-2922; Rev 1; 2004-05-20
    This page last modified: 2007-08-13



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